Four posts landed this month that together map out a real GEMM/kernel-tuning workflow on AMD Instinct - from finding what’s slow to fixing it at every level.
Quick reference table
| Blog | Key result | Who it’s for |
|---|---|---|
| Thread Trace Part 1: ROCprof Compute Viewer | Instruction-level timing, stalls, utilization, and perf counters via rocprofv3 + RCV (ROCm 7.13+) | Anyone starting from “something’s slow” with no idea why yet |
| Iteratively Tuning hipBLASLt TensileLite Kernels | Small iterative search beats a full sweep on MI325X - less time, no regression risk | Kernel authors tuning GEMM configs by hand or by brute force today |
| A Deep Dive into LDS Optimizations on AMD Instinct MI450 GPUs | Bank-conflict and warp-layout fixes for lock-stepped GEMM in Gluon/Triton, via ATT profiling | Developers already past the easy wins, hunting for the next few percent |
| An Educational GEMM Ladder for Helios GPUs | 13-level HipKittens walkthrough on Helios (256 WGPs, 8 XCDs, 432GB HBM4) | Anyone who learns best by seeing the whole climb, one optimization at a time |
Read together, they trace a single arc: figure out what’s actually slow, stop guessing at kernel configs, push past the easy wins into shared-memory tuning, then see the entire climb laid out step by step on next-gen hardware. Each stands on its own, but read in that order they double as a mini-curriculum in AMD Instinct kernel optimization.
Thread Trace Part 1: ROCprof Compute Viewer — ROCm Blogs
The first post in a three-part series on thread trace profiling. Covers how to capture GPU thread traces with rocprofv3 and analyze instruction timing, stalls, utilization, and performance counters using ROCprof Compute Viewer (RCV). Requires ROCm 7.13+. If profiler output has left you staring at aggregate numbers without knowing which instructions are actually stalling, this gets you down to instruction-level visibility - groundwork for parts 2 and 3.
Iteratively Tuning hipBLASLt TensileLite Kernels: A Smaller Search, a Faster Kernel — ROCm Blogs
Makes the case that a small iterative search - warm-start, coordinate descent, tile expansion - beats a big one-shot sweep for hipBLASLt TensileLite kernel tuning on AMD Instinct MI325X. The iterative approach finds strong configurations in less time than a brute-force sweep, with no risk of regressing to a worse kernel along the way.
A Deep Dive into LDS Optimizations on AMD Instinct MI450 GPUs — ROCm Blogs
The second entry in AMD’s MI450 optimization series, this one focused on Local Data Share (LDS) tuning for lock-stepped GEMM kernels written in Gluon/Triton. Covers LDS bank conflict analysis, warp layout optimization, and how to use ATT-based profiling to find and fix the bottlenecks - the next layer down once the easier, higher-level optimizations are exhausted.
An Educational GEMM Ladder for Helios GPUs — ROCm Blogs
A progressive, educational walkthrough of GEMM optimization on AMD’s next-gen Helios architecture (256 WGPs, 8 XCDs, 320KB LDS per WGP, 432GB HBM4 at 23TB/s), using HipKittens. Starts from a naive baseline and climbs through 13 levels - double buffering, async loads, larger tiles, deeper K-strides, partitioned LDS, TDM loads, split barriers, and beyond - showing exactly which optimization buys you what at each step.
Whether you’re chasing a specific bottleneck or building a general kernel-tuning toolkit, these four give you the full loop: measure it, search for it, tune it by hand, and see the whole ladder someone else already climbed.
Drop questions or your own numbers below - always good to see how these techniques land on different workloads.